if ( gio->pic_elcr & mask ) {
/* level */
if ( level ) {
- atomic_set_bit(irq, &gio->pic_irr);
atomic_clear_bit(irq, &gio->pic_clear_irr);
+ atomic_set_bit(irq, &gio->pic_irr);
global_env->send_event = 1;
}
else {
- atomic_set_bit(irq, &gio->pic_clear_irr);
atomic_clear_bit(irq, &gio->pic_irr);
+ atomic_set_bit(irq, &gio->pic_clear_irr);
global_env->send_event = 1;
}
}
if ( !plat->interrupt_request )
return -1;
+ plat->interrupt_request = 0;
/* read the irq from the PIC */
intno = pic_read_irq(s);
*type = VLAPIC_DELIV_MODE_EXT;
- plat->interrupt_request = 0;
return intno;
}
__vmread(VM_ENTRY_INTR_INFO_FIELD, &intr_fields);
if (intr_fields & INTR_INFO_VALID_MASK) {
+ enable_irq_window(cpu_exec_control);
VMX_DBG_LOG(DBG_LEVEL_1, "vmx_intr_assist: intr_fields: %lx",
intr_fields);
return;